1. Field of the Invention
The present invention generally concerns the affixation of lead frames, and leads, to ceramic electrical components, particularly including ceramic capacitors.
The present invention particularly concerns ceramic capacitors having predetermined coefficient of thermal expansion, and lead frames for these ceramic capacitors which lead frames also have a predetermined coefficient of thermal expansion.
2. Description of the Prior Art
2.1 Coefficients of Thermal Expansion
It is known to match the coefficients of expansion in different materials used in a ceramic electronic components, including ceramic capacitors, and in the electrodes, leads and/or lead frames of the ceramic electronic components.
For example, U.S. Pat. No. 3,946,290 to Yoshioka, et. al. for a HIGH TENSION CERAMIC CONDENSER, assigned to TDK Electronics Co. Ltd. (Tokyo, JA) concerns an improved high voltage ceramic capacitor which includes a ceramic body having electrode layers formed on opposite sides thereof. Novel terminals--formed of material having a coefficient of expansion which is the same as, or nearly the same as, the material of the ceramic body--are bonded to the electrode.
Further by way of example, U.S. Pat. No. 4,279,785 to Stewart, et. al., for GLASS ENCAPSULATION OF SEMICONDUCTOR DEVICES, assigned to ITT Industries, Inc. (New York, N.Y.), concerns a low melting point glass for semiconductor device encapsulation. The glass is based on the lead oxide/phosphorus pentoxide/vanadium pentoxide system and has a thermal coefficient of expansion similar to that of a copper alloy lead frame. The glass is applied to a device as a frit which is then heat fused.
Rarely, materials having different thermal coefficients of expansion have been combined in electronic components.
For example, U.S. Pat. No. 4,065,636 to Herczog for a HERMETIC ENCLOSURE FOR ELECTRONIC COMPONENT, assigned to Corning Glass Works (Corning, N.Y.), concerns a hermetic enclosure for an electrical component, particularly for a tantalum capacitor, and a method of forming it. A silver container is provided having an open end at which an outwardly protruding flange is formed. A quantity of sealing glass is sealed to a lead and formed into a bead about the lead intermediate the ends thereof. A metallic collar having an outwardly protruding flange is disposed about the bead. This assembly and a metallic band, having a temperature coefficient of expansion greater than the glass bead, is heated and the metallic band is disposed about the collar so as to place the collar and glass bead in compression upon cooling thereby effecting a compression seal between the collar and the glass bead. A hermetic seal is then effected between the outwardly protruding flange of the container and the outwardly protruding flange of the collar.
At the same time, it is known to attempt to compensate for, avoid, and/or mitigate such stress-related damage as may occur from the mounting and mating of electronic components having materials with different coefficients of expansion.
For example, U.S. Pat. No. 4,151,579 to Stark for a CHIP CAPACITOR DEVICE, assigned to AVX Corporation (Great Neck, N.Y.), is directed to a capacitor device and method of forming same, and more particularly to a monolithic ceramic capacitor incorporating an improved conductive termination arrangement providing a compliant connector for mechanically and electrically connecting the capacitor to a substrate, said termination arrangement providing increased resistance to damage to the capacitor as a result of differential coefficient of expansion between the capacitor and the substrate on which it is mounted.
It is also known that multiple electrical connections can be made in the various areas of a single lead frame, and that the lead frame itself, exhibiting as it does electrical reactance, may be engineered as part of the circuit in which the electronic component carried by the lead frame is used.
For example, U.S. Pat. No. 4,454,529 to Philofsky, et. al., for an INTEGRATED CIRCUIT DEVICE HAVING INTERNAL DAMPENING FOR A PLURALITY OF POWER SUPPLIES, assigned to AVX Corporation (Great Neck, N.Y.), is directed to an integrated circuit device comprising a lead frame having a ceramic capacitor mounted thereon and forming the support for a silicon chip bearing a large number of circuits, including at least two power supply circuits; namely, a main power supply circuit and a secondary circuit. The capacitor is shunted across the terminals of the main power supply and the main power terminals of the IC chip. A conductive layer disposed atop the ceramic uppermost layer of the capacitor defines, along with the uppermost electrode of the capacitor, a second capacitive load of lesser value than is the main capacitor, this second capacitive load being shunted across the terminals of the secondary power supply and a secondary set of power terminals of the chip. The provision of internal capacitive shunting for the several power supplies for the chip enables lead length to the capacitors to be maintained at a minimum, thereby minimizing inductive reactance and thus enabling small capacitances to effectively dampen noise and pulses in the circuit.
The geometries of the lead frames, and the electrical components that it serves to support and to connect, can be quite complex.
For example, U.S. Pat. No. 4,594,641 to Hernandez for a DECOUPLING CAPACITOR AND METHOD OF FORMATION THEREOF, assigned to Rogers Corporation (Rogers, Conn.), presents a decoupling capacitor including a pair of conductors, each having a lead connected thereto formed from a continuous strip of electrically conductive material (lead frame), the strip having opposing planar surfaces. A pair of dummy leads, each being associated with a conductor, but isolated therefrom, is also formed from the strip. Thereafter, a strip of first insulating material is positioned across from one opposing surface of the conductive strip and a strip of second insulating material having a plurality of openings or windows therein is positioned on the other opposing surface of the conductive strip. The two insulating layers sandwiching the conductive strip are then heat tacked and hot press laminated to form a continuous strip of laminated material. The windows are positioned on the conductive strip to define access opening for the two conductors. Next, drops of solder paste are deposited on each conductor through the windows whereupon a multi-layer monolithic ceramic capacitor is placed through each window, between the two conductors and in contact with the solder paste. The multi-layer capacitor includes first and second conductive end surfaces which are electrically and mechanically bonded respectively to each conductor via the solder (after a reflow process). The multi-layer capacitor is then encapsulated and sealed by placing encapsulant material (i.e., epoxy, silicon, etc.) in the space defined by the window. Finally, the now sealed, laminated and encapsulated decoupling capacitor is severed from the lead frame. The decoupling capacitor thus formed is both hermetically sealed and automatically insertable for use in conjunction with integrated circuit DIP inserter devices.
Similarly, U.S. Pat. No. 4,630,170 to Kask, deceased, et. al., for a DECOUPLING CAPACITOR AND METHOD OF MANUFACTURE THEREOF, assigned to Rogers Corporation (Rogers, Conn.), concerns a decoupling capacitor and method of manufacture thereof wherein the decoupling capacitor is formed from a lead frame which contains the four leads of the capacitor (two of which are electrically inactive) on a single plane. The use of a lead frame automatically provides the dimensional tolerances necessary for encapsulation molding of the decoupling capacitor. The decoupling capacitor is a hermetically sealed capacitive unit consisting of a single layer ceramic capacitor, active leads bonded to the capacitor and dummy pins for auto-insertion into printed circuit boards.
Still further, U.S. Pat. No. 4,832,612 to Grabbe, et. al., for a PROTECTIVE CARRIER AND SECURING MEANS THEREFOR, assigned to AMP Incorporated (Harrisburg, Pa.), concerns a protective carrier having a flexible circuit attached thereto, the protective carrier protecting the circuit during transportation and handling thereof. The flexible circuit is attached to the protective carrier in such a manner as to ensure proper registration and to maintain the center of all components in coincidence as dimensional change occurs due to the different temperature coefficient of expansion of each component. The protective carrier can be used to orient, position, and install an integrated circuit chip carrier and lead frame on an interposer socket. As the lead frame has a large number of contact zones positioned thereon, contact force is required between the interposer socket and the lead frame. Thus, a pressure plate is provided to cooperate with posts and the protective carrier to provide the force required to ensure that a positive electrical connection is effected between the contact zones and the contacts of the interposer socket.
2.2 Miscellaneous Data on Materials: Ceramic, and Metals Including Phosphor Bronzes, Cupro Nickels and Nickel Silvers, and Nickel Iron
It will be seen that the present invention depends on the properties of materials, particularly the coefficient of thermal expansion (CTE) properties of materials.
In this regard, and as background to the present invention, it should be known that ceramic--whether of the barium titanate or the ferrite type, or even the alumina type or still other types--commonly has a coefficient of thermal expansion of about 10 parts per million per degree Centigrade (10 ppm/.degree.C.).
As further background to the present invention, it should be known that different metals, and metal allows, have differing coefficients of thermal expansion. For example, and among the metals and metal alloys commonly used for electrically connecting electronic components, the phosphor bronzes--which commonly contain from about 91.9% to 94.9% copper (Cu), 5% to 8% tin (Sn) and 0.1% phosphorus (P)--have coefficients of thermal expansion that are about 9.9-10.1 ppm/.degree.C. For example, the cupro nickels and nickel silvers--which commonly contain from about 55% to 72% copper (Cu), 9.5% to 30% zinc (Zn) and 0.6% to 18% iron (fe), tin (Sn) or nickel (Ni)--have coefficients of thermal expansion that are about 9.0-9.3 ppm/.degree.C. Finally, nickel iron--which is commonly about 42% nickel (Ni), 0.02% carbon (C), 0.6% manganese (Mn) with the balance iron (Fe)--has a coefficient of thermal expansion as low as 2.3 ppm/.degree.C., and most commonly &lt;5 ppm/.degree.C. for all alloys so called.
Clearly it is nickel iron, only (among common metals used in electrically connecting electronic components), that has a coefficient of thermal expansion less than ceramic. This property will be seen to be used to good effect in the present invention. Indeed, this family of alloys is called "low expansion alloys" by Ed Fagan, Inc., a leading U.S. supplier of industrial metals.
Further in background to the nickel-iron alloy family, it should be known that this family generally includes INVAR and KOVAR alloys; alloys 42, 46, 48, and 52; alloy 42-6; and magnetic shielding alloys such as MuMetal. The KOVAR alloys are UNS nos. K94610, K94620 and ASTM nos. F-15, F-1466. The 52 alloy is UNS no. K14052 and ASTM no. F-30. The 48 alloy is UNS no. K94800 and ASTM no. F-30. The 46 alloy is UNS no. K94600 and ASTM no. F-30. The 42 alloy is UNS no. K94100 and ASTM no. F-30. The 48-6 alloy is UNS no. K94760 and ASTM no. F-31. Finally, INVAR 36 alloys are UNS nos. K93601, K93602 and ASTM nos. F-658, B-753. There exist additional (U.S.) military specifications for these alloys; MIL 123011C Classes 1-7.
In general, the nickel-iron group of alloys is not hardenable by heat treatment. They can be made harder through cold working only. The annealed hardness for these alloys is generally in the range of RB 70/80, whereas the 1/4 H to 1/2 H range for this group of metals can run between RB 80/96.
Although the present invention is not concerned with the machining of nickel-iron alloys, a few words on the machining of this material are relevant insofar as they tend to show the pronounced effects of (i) oxide creation (albeit not the effect of such oxide on electrical conductivity), and, separately, (ii) heat buildup (albeit not from the environment, but instead from machining). The present invention takes both these properties into account, although not in the context of machining.
Nickel-iron material in the annealed condition is more difficult to machine because it is soft and gummy; tools tending to plow the metal instead of cuffing into it, with chips not easily formed. Surface scale oxide is tightly adherent and penetrates the surface to a greater extent than stainless steels. Machining is considerably improved by descaling the material. If there were standard machinability ratings applied for this series of alloys, alloy AlSi-B-1112 being measured as 100%, the following percentages could be suggested for these chemistries: INVAR FM 60%; (KOVAR) ASTM-F15 40%; and Alloy 48 40%.
It will be seen that the present invention is believed to offer a beneficial effect during soldering. A remote suggestion that the nickel iron alloys might induce stresses in anything with which, and to which, they are mechanically fixed during heating and/or the presence of heat--such as during soldering--is presented by the fact that it is known to control heat buildup in nickel iron alloys during machining. Heat buildup is the major cause of warpage. Suggested coolants are Keycoot 2000 or Prime Cut. (Whatever lubricant is used for machining, it should not contain sulphur. Sulphur can effect the performance of many sealed electronic parts.) Although not integral to the present invention, the present invention will be seen to make beneficial use of any induced stresses that may arise upon the soldering of nickel iron alloys (if any such stresses do arise, which seems likely).